Senior Verification Engineer
The Senior Verification Engineer will be a key member of the Digital Team, developing a family of ultra-low power Arm-based MCU SOCs. This position is cross-disciplinary, focusing on front end digital verification, with additional responsibilities in silicon validation, digital design, and EDA tool methodologies. The Senior Verification Engineer will collaborate extensively with the Digital Design Team, and interact with the Firmware Development Team, Analog Design Team, and CAD implementation Team. The primary responsibility for this position is to develop and maintain verification infrastructure for achieving optimal pre-tapeout quality in ultra low power SOC products. The Senior Verification Engineer will also own module level verification implementation for periphery designs within the SOC.
- Own and be responsible for pre-tapeout quality for digital SOC modules on the MCU.
- Architect, implement, and maintain the verification methodologies and environment.
- All aspects of verification activities including generation of verification plans, development of test benches, C-code test cases, checkers, monitors, scoreboards for achieving functional coverage, power and performance goals.
- Define, monitor, and communicate project status including risk identification, prioritization and mitigation.
- Champion best verification practices, and ensure consistent and efficient development flow.
- Collaborate with Design Team for achieving quality silicon as it relates to implementation trade-offs and verification complexity.
- Assist in silicon bring-up and validation.
- Mentor and support verification engineers on project execution.
The Senior Verification Engineer must have extensive experience verifying complex ASICs with the capacity to architect, design, and support the digital verification environment. The candidate must be comfortable working at any stage of the verification process, and possess the attitude and personality to jump-in when problems arise. Experience specifying, developing, managing, and leveraging advanced verification capabilities is also a requirement. Knowledge of low power digital design flows is important. The candidate must have experience with Arm based SOC development.
- BS/MS in ECE/EE and 5+ years of experience required.
- Extensive experience defining, implementing, and verifying SOC modules required.
- Successful track record working in a Senior Digital Verification Role is required.
- Experience working with and developing verification code on SOCs peripherals is required.
- Experience working with standards including ARM AMBA APB, AHB, AXI bus based SOCs is desirable.
- Good knowledge of inter-processor communication with shared memory system, interconnect, and MCU peripherals (SPI, I2C, GPIO, RTC, ADC, etc.) is a plus.
- Strong communication skills and the ability to work with diverse technical teams required.
- Extensive experience specifying, developing, managing and leveraging advanced verification capabilities (e.g., UVM, System Verilog, C/C++, Perl, Tcl, Unix scripting, formal verification, constrained random testing combined with assertion based verification, code and functional coverage) at the full-chip level required.
- Experience in SOC level performance and power modeling and analysis desirable.
- Excellent problem solving skills dealing with complex system level issues related to hardware/software debug.
- Experience developing or working with FPGA emulation platforms desirable.
Key Personal and Professional Attributes:
Ambiq management is building a company that values continued technology innovation, a fanatical attention to customer needs, collaborative decision making, and, above all, enthusiasm for energy efficiency. The incoming candidate should embrace these same values. The successful candidate must be self-motivated, extremely creative, and should be comfortable learning exciting new technologies. This is an opportunity for growth and an opportunity to work on complex, interesting, and challenging projects.
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Senior Verification Engineer
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