Staff Design Verification Engineer

U.S. (any location)


The Staff Design Verification Engineer will be responsible for verification of digital designs for CMOS integrated circuits, including systems-on-chip with multiple CPUs, and digital signal processors, dedicated DSP hardware, and other digital logic for automotive radio applications.

Specific Responsibilities:

  • Verification planning, environment, test-bench, test-cases, and self-checking development.
  • Develop verification methodology for design/mixed-signal and implement verification IP.
  • Develop System Verilog/Verilog-AMS models for analog circuits to enable efficient full chip functional verification.
  • Work closely with Design Team and participate in specification/design review meetings with Design and Verification Engineers.
  • Investigate RTL or transistor-level design to debug and propose solutions.


The Staff Design Verification Engineer must be an engineer with a complete experience developing verification environment to verification closure. A deep knowledge of low power verification is extremely important.

Specific Qualifications:

  • Bachelor of Science/Master’s/PhD in Electronics and Communication Engineering/Electrical Engineering and 12+ years of experience required.
  • Extensive experience defining, implementing, and verifying system-on-chip (SOC) modules required.
  • Successful track record working in a Senior Digital Verification Role is required.
  • Experience working with and developing verification code on SOCs peripherals is required.
  • Experience working with standards including ARM AMBA APB, AHB, AXI bus based SOCs is desirable.
  • Good knowledge of inter-processor communication with shared memory system, interconnect, and MCU peripherals (SPI, I2C, GPIO, RTC, ADC, etc.) is a plus.
  • Strong communication skills and the ability to work with diverse technical teams required.
  • Extensive experience specifying, developing, managing and leveraging advanced verification capabilities (e.g., UVM, System Verilog, C/C++, Perl, Tcl, Unix scripting, formal verification, constrained random testing combined with assertion-based verification, code and functional coverage) at the full-chip level required.
  • Experience in SOC level performance and power modeling and analysis desirable.
  • Experience in gate level simulation and debug.
  • Excellent problem-solving skills dealing with complex system level issues related to hardware/software debug.
  • Experience developing or working with FPGA emulation platforms desirable.
  • Good interpersonal skills to work at a cross-functional team.
  • Good verbal and written communication skills in English.

Key Personal and Professional Attributes:

Ambiq management is building a company that values continued technology innovation, a fanatical attention to customer needs, collaborative decision making, and, above all, enthusiasm for energy efficiency. The incoming candidate should embrace these same values. The successful candidate must be self-motivated, extremely creative, and should be comfortable learning exciting new technologies. This is an opportunity for growth and an opportunity to work on complex, interesting, and challenging projects.

Please submit resumes to [email protected] or complete the form below.

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